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1. Field of the Invention
The invention relates generally to the field of electronic detection. More particularly, the invention relates to peak detection. Even more particularly, the inventions relates to methods and apparatuses that provide digital peak detection among multiple signals.
2. Discussion of the Related Art
In electronic detection applications, it may be necessary to find and record pulse peaks from continuous streams of analog signals. The streams of analog signals may be, for example, amplified laser detector outputs, or the like. In analog detectors, a front-end amplifier circuitry has been used to deliver high level analog signals to the balance of a detection circuit. A commonly employed analog peak finding technique includes utilizing a biased diode matrix to find the largest input signal among the various input channels. A digital follow-on circuit for pulse amplitude recording and transmission has also been used.
A problem with this technology has been the small instantaneous dynamic range of the analog detection circuit, typically of the order of 20 to 1, which prevents it from being able to track widely varying signals. Therefore, what is required is solution that provides a wide instantaneous dynamic range.
Another problem with this technology has been that the very high speed emitter coupled logic (ECL) parts needed for the peak detection and capture functions dissipate a substantial amount of power. Therefore, what is also needed is a solution that can operate with low power dissipation.
The following U.S. patents are representative of aspects of the state of technology relating to electronic detection.
U.S. Pat. No. 6,424,900, which is incorporated by reference, involves a partial discharge measurement system is provided which comprises a digital peak detection circuit. The partial discharge measurement system digitizes and detects both positive and negative slopes of a signal from an electrical device being tested. The partial discharge measurement system controls the shape of pulse capture windows in accordance with different modes of operation, and controls the timing of pulse data capture depending on the mode of operation and the polarity of the signal.
U.S. Pat. No. 6,215,335, which is incorporated by reference, involves a peak detector that compares an input signal to a first reference voltage to produce a maximum sample signal, and compares the input signal to a second reference voltage to produce a minimum sample signal, wherein the maximum and minimum sample signals produce a sampling of the current input signal thereto to produce a maximum output signal and a minimum output signal, respectively. The detector compares the previously retrieved input signal value with a current input signal value. The current input signal is used as the maximum output signal if it is greater than a previous maximum output signal and providing the current input signal as the minimum output signal if it is less than a previous minimum output signal. The output provides signal level and offset signal information which, when gated with a predetermined clock signal, produces nonoverlapping phased output signals.
U.S. Pat. No. 5,920,438, which is incorporated by reference, involves a programmable digital device and method for generating tracking threshold signals for qualification of input peak signals in response to programmed digital gain signals which control the rate at which the envelope of the qualified input peak signals is followed, and in response to a programmed digital attenuation signal which determines the proportion of the peak envelope at which to generate new tracking threshold signals. The programmable digital device and method also provide a programmed clamp signal to clamp the positive and negative threshold signals to not fall below the programmed values. An anti-hang capability is provided to allow the thresholds to drop after a programmed time period during which no signal is detected. In an alternative arrangement, the centerline of the envelope is followed and used as the threshold.
U.S. Pat. No. 5,631,592, which is incorporated by reference, involves a pulse generation and sensing arrangement in a microprocessor system (100—this and the other numbers in this paragraph are taken from U.S. Pat. No. 5,631,592) includes an input/output terminal (130) which receives an input signal or produces an output signal, an edge detector (132) which senses pulse edges in the input signal, timers (108, 110) which produce time values, registers (120, 124, 126) which hold time values produced by the timers corresponding to edges detected by the edge detector or which hold values corresponding to pulse edges to be generated, comparators which compare the values held in the registers with time values produced by the timers, and a flip-flop (128) for generating a signal whose state changes in response to the comparators. The arrangement allows the generation and/or sensing of signals with short pulse widths and a wide range of duty cycles, and minimizes software overhead. A continuous PWM signal may be generated without further software involvement after initial writing of edge values.
The shortcomings described above are not intended to be exhaustive, but rather among the many that tend to impair the effectiveness of previously known techniques of detecting the peak pulse from multiple inputs. Other noteworthy problems may also exist; however, those mentioned here are sufficient to demonstrate that methodologies appearing in the art have not been altogether satisfactory.